Intel CEO: we want 1 trillion transitors in a single package by 2030

Intel is shooting for the stars with some big teases at Hot Chips 34 this week, with Intel CEO Pat Gelsinger teasing that he sees Intel reaching 1 trillion transistors in a single chip by 2030.

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We're seeing Intel make those steps towards 1 trillion transistors by 2030, with the upcoming 14th Gen Core "Meteor Lake" CPUs set to feature a LEGO-like chiplet design, with advanced packaging technologies -- including its own 3D Foveros packaging technology -- will keep Moore's Law ticking along.

Intel CEO Pat Gelsinger explained at Hot Chips 34 that the company is transitioning from a wafer foundry era to a systems foundry era: which is when we'll see the combination of wafer, packaging, chiplet, and software advances.

• Read more: Intel's new 3D Foveros packaging tech: LEGO-like chiplets for CPUs

Gelsinger said: "If you think about it, the rack is becoming a system. And the system is becoming an advanced package of multiple dies and chiplets. Literally, the system is becoming the advanced packaging technology of the future. And when I say the rack is becoming a system, the system is becoming an advanced chiplet-based SOP (system on package), that's exactly what we mean and how we see it evolving".

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Gelsinger said that right now there are around 100 billion transistors on a package, where he said that the fuel that Intel is using to aim for 1 trillion transistors by 2030 is that customers don't want more chips... they want more powerful chips that can work through their AI models that are getting bigger and bigger.

1 trillion transistors sounds pretty insane, considering NVIDIA is only just hitting 80 billion transistors on its new Hopper H100 GPU, which is made on the custom-designed 5nm process node at TSMC. Intel CEO Pat Gelsinger continued: "Today, there are about 100 billion transistors on a package, and we see our way clear to getting to a trillion transistors by the end of the decade. With ribbon FET we have a fundamental new transistor structure that we're just about to come into, that we believe continues to scale through the end of the decade".

Gelsinger added: "And we have our next-generation capability to take advantage of these in products like Meteor Lake, which are being brought to the marketplace next year. And beyond that Arrow Lake and our second gen of 3D packaging technologies, they're starting to take advantage of these types of advanced packaging capabilities".

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"You may say, hey, I'm getting two chiplets from Intel, I'm getting one of the chiplets from a TSMC factory, maybe the power supply components from TI, maybe there's an IO component coming from Global Foundries, and of course, Intel has the best packaging technologies so they're gonna be the one assembling all those chiplets together, but maybe it's another assembly provider as well, so we do see that mix and match happening".

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"Moore's Law, this continuing doubling of transistor capability as the dimensions shrink over time, is fundamentally the driver of everything that we've been able to accomplish," he said, and promised that Intel will "keep moving Moore's Law forward".